As the costs of power and timing become increasingly difficult to manage in traditional synchronous systems, designers are being forced to look at asynchronous alternatives. Based on reworked and expanded papers from the 7th Banff Higher Order Workshop, this volume examines asynchronous methods which have been used in large circuit design, ranging from initial formal specification to more standard finite state machine based control models. Written by leading practitioners in the area, the papers cover many aspects of current practice including practical design, silicon compilation, and applications of formal specification. It also includes a state-of-the-art survey of asynchronous hardware design. The resulting volume will be beneficial to anyone interested in designing correct asynchronous circuits which exhibit high performance or low power operation.